Design of the decoder of BCH(31,21) code based on FPGA;
基于FPGA的BCH(31,21)码译码器的设计
Development of decoder-testing instrument;
译码器测试仪的研制与应用
Turbo codes decoder based on MAX-Log-MAP algorithm and DSP chip;
基于MAX-Log-MAP算法和DSP芯片的Turbo译码器
Christmas tree type decoder
“圣诞树”型译码器
FPGA Implementation of SOVA-Based Turbo Decoder;
Turbo码SOVA译码器FPGA实现
Design and implementation of a high-throughput decoder for multi-rate LDPC code
多码率LDPC码高速译码器的设计与实现
Optimized Decoder Design and Implement for High Rate LDPC Codes
高码率LDPC码译码器的优化设计与实现
The Signal Generator and Encoder of Bark Code Based on CPLD;
基于CPLD的巴克码信号发生器与译码器
digital decoder
数字译码器 -集成电路的
The Study and Implementation of Viterbi Decoder in IEEE802.11a;
IEEE802.11a Viterbi译码器设计研究
High-Speed Viterbi Decoder on FPGA;
高速Viterbi译码器的FPGA实现
Low Power Design for Viterbi Decoder;
Viterbi译码器的低功耗设计
FPGA Design of A Viterbi Decoder;
Viterbi译码器的FPGA设计
Implementation of FPGA for RS(255,247) Decoder
RS(255,247)译码器的FPGA实现
Hanming Encoder and Hanming Decoder Based on VHDL Language Design;
基于VHDL语言的汉明码编码器和译码器的设计
SECO (Self-regulating Error-Correcting Coderdecoder)
自调误差修正编码-译码器
Research on Encoder and Decoder of Turbo Codes and Its Implementation with FPGA;
Turbo码编译码器的研究及其FPGA实现
The Implementation of Turbo Coding and Decoding System Based on DSP;
基于DSP的Turbo码编译码器的实现
FPGA Decoder Implementation for Quasi-Cyclic Low-Density Parity-Check Codes;
准循环低密度校验码译码器的FPGA实现
Design and FPGA Implementation of Turbo Decoder;
Turbo码译码器设计及其FPGA实现
Principles of the Codec for LDPC Codes and Its Hardware Implementation;
LDPC码编译码器的原理及其硬件实现
